Leveraging Default Intel Optimizations for TensorFlow
This lab will provide hands-on experience using official TensorFlow for Transfer Learning on a common use case and demonstrate its ease of use. We will run inference on the re-trained model, optimize the model for best latency and finally deploy it using TensorFlow serving on a 3rd Gen Intel® Xeon® Scalable Processors with AI acceleration. We will conclude with a demo highlighting improved AI performance with new Intel® Advanced Matrix Extensions (Intel® AMX) instructions on the next generation of (delete) 4th Gen Intel® Xeon® Scalable Processors (formerly codenamed Sapphire Rapids).
Speaker(s)
Sachin Muradi - Intel/Deep Learning Software Engineer
Sachin Muradi has been at Intel for 5 years and is part of the team that deals with the Tensorflow-oneDNN Direct Optimization which helps integrate Intel oneDNN optimizations for CPUs in Google’s open source ML framework Tensorflow. He has experience working on various libraries/compilers for deep learning accelerator hardware within Intel, such as nGraph backend for Deep learning inference Accelerator (SpringHill), Movidius/ VPU compiler – openVINO plugin, FPGA (DLIA)
