In the first part of this talk, we will introduce the Cache-aware Roofline Model (CARM) and expose its basic principles when modelling the performance upper-bounds of a processor. We will also discuss our recent research contributions in extending the model insightfulness with application-driven CARM, as well as applying the CARM principles to model power consumption and energy-efficiency upper-bounds. In the second part of this talk, we will rely on CARM implementation in Intel® Advisor to showcase its ability to drive the optimization of epistasis detection, an important application in bioinformatics. For both Intel CPU and GPU devices, we will demonstrate how CARM can be used to detect execution bottlenecks and provide useful hints on which type of optimizations to apply in order to fully exploit device capabilities. The guidelines provided by CARM were fundamental to achieve the speedups of more than 20x on Intel® six-core CPU and Gen 9.5 GPU.