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Huawei Extends DPC++ with Support for its Ascend AI Chipset

Applying the oneAPI Industry Initiative to Real-World AI Use Cases

huawei researchers

Wilson Feng, Rasool Maghareh and Amy Wang collaborate on compiler software and research at Huawei’s Heterogeneous Compiler Lab.

Software developers now have a tool for running heterogeneous hardware to maximize computing power for a range of workloads across all devices – thanks to the oneAPI specification.  To achieve advanced computing capabilities, they’re replacing coding obstacles with a single, open-source programming model for CPUs, GPUs, FPGAs, and more.  With this work-style transformation, developers now are able to rapidly and correctly produce performant, cross-platform code with standards-based tools.  

An example of developers applying oneAPI open source specification concepts is found in the work performed by Wilson Feng, Rasool Maghareh, and Amy Wang at Huawei’s Heterogeneous Compiler Lab based in Markham, Ontario, Canada.  

While Huawei’s Heterogeneous Compiler Lab’s central mission is to leverage innovative programming technologies to improve the performance of Huawei products, they are also sharing their research with members of the oneAPI industry initiative.  In addition to research and development on compilers, this includes work on language runtimes, system-level exploitation of machine learning/artificial intelligence frameworks, and concurrent/distributed systems.  

The Lab’s successes – using heterogeneous computing to support multiple types of processors or accelerators – utilizes the DPC++ programming language, part of the oneAPI Specification, which is built on top of the Khronos Group’s SYCL standard.  SYCL (pronounced “sickle”) is a royalty-free, cross-platform abstraction layer, which enables code for heterogeneous processors to be written using C++ with the host and kernel code for an application contained in the same source file.  

CCE SYCL Plugin

The CCE runtime plugin performs command group scope instructions that act as an interface between host and device.

Originally presented as a technical talk at IWOCL & SYCLcon 2021, Feng and Maghareh review the implementation steps they took to add support for the Huawei Ascend AI Chipset to DPC++.  They also introduce Huawei’s Ascend AI Background and speak to the following topics: their contribution to DPC++, the CCE SYCL backend, the CCE SYCL plugin, the compilation toolchain, extension to USM, support for parallel for, supported examples, and future work.  

Watch the full presentation: Extending DPC++ with Support for Huawei Ascend AI Chipset

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Video: Extending DPC++ with Support for Huawei Ascend AI Chipset

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